PXD20RM Datasheet, PDF (613/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

14.4.2.8 Event Time Timer (EVTMR)
Offset: 0xE0
read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
EVTMR[23:16]
W
Reset — 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
EVTMR[15:0]
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 14-11. Event Time Counter Register (EVTMR)
This 32-bit register has only one field - the 24-bit event time counter. The counter decrements to 0, on
reaching 0, the interrupt and the DMA request are made pending. On reaching 0, the counter will re-load
from event count preset register if the bit eventCountFreeRun is set in the perfmon_config register.
On reaching terminal count, all performance monitor count registers are loaded in the performance
monitor buffer registers, and cleared.
The register is read/write.
14.4.2.9 Event Time Preset (EVPRST)
Offset: 0xE4
read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
EVPRST[23:16]
W
Reset — 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
EVPRST[15:0]
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 14-12. Event Time Preset Register (EVPRST)
The event_time_preset register contains the 24-bit preset value to be loaded into the event time counter
register in case this preloads.
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
14-13