PXD20RM Datasheet, PDF (160/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Address: Base + 0x0060 (THRHLR0)
Base + 0x0064 (THRHLR1)
Base + 0x0068 (THRHLR2)
Base + 0x006C (THRHLR3)
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R0 0 0 0 0 0
W
THRH
Reset 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R0 0 0 0 0 0
W
THRL
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 5-16. Threshold Register (THRHLR[0:3])
Table 5-14. Threshold Register (THRHLR[0:3]) field descriptions
Field
0:5
6:15
16:21
22:31
Description
Reserved
Write of any value has no effect, read value is always 0.
THRH: High threshold value for channel n.
Reserved
Write of any value has no effect, read value is always 0.
THRL: Low threshold value for channel n.
5.3.6 Conversion timing registers CTR[1..2]
The 0 to 31 range shown below is the maximum range for the channel type. For the exact number of
available channels, please refer to Table 5-1.
CTR1 = associated to extended internal channels (from 32 to 63)
CTR2 = associated to external channels (from 64 to 95)
5-18
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor