PXD20RM Datasheet, PDF (1345/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

SGM Register Base + 0x00B4
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R0
0
0
0
0
0
0
0
0
0
0
0
W
CHSL
Reset 0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R0
0
0
0
0
0
0
0
0
0
0
0
W
CHSR
Reset 0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
Figure 39-17. Mixer Configuration Register (MIXCR)
Field
19-16
CHSL
3-0
CHSR
Table 39-20. MIXCR Register Description
Description
Channel Select for left mixer.
• CHSL[3]=0 : channel 3 is not selected for left mixer
• CHSL[3]=1 : channel 3 is selected for the left mixer
Channel Select for right mixer.
• CHSR[3]=0 : channel 3 is not selected for the right mixer
• CHSR[3]=1 : channel 3 is selected for the right mixer
39.6.2.17 Clock Configuration Register for PWM (CLKPWM)
The CLKPWM register determines the PWM clock.
SGM Register Base + 0x00B8
31
30
29
28
27
26
25
24
23
22
21
20
19
R
CLKS
W
0
0
0
0
0
0
0
0
0
0
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
15
R
W
Reset 0
14
13
12
11
10
9
8
7
6
5
4
3
PRSM
0
0
0
0
0
0
0
0
0
0
0
0
Figure 39-18. Clock Configuration Register for PWM (CLKPWM)
Field
31-30
CLKS
29-24
Table 39-21. CLKPWM Register Description
Description
Clock Source Selection Resampler. See Table 39-6 for details.
Reserved.
18
17
16
PRSR
0
0
0
2
1
0
0
0
1
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
39-21