PXD20RM Datasheet, PDF (703/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Chapter 18
Enhanced Modular IO Subsystem (eMIOS)
18.1 Introduction
The configurable enhanced Modular Input/Output Subsystem (eMIOS200 or just eMIOS) provides
functionality to generate or measure time events. The eMIOS200 builds on this concept by using a Unified
Channel module that provides a superset of the functionality of all the individual MIOS channels, while
providing a consistent user interface. Each Unified Channel can be programmed for different functions in
different applications of the chip. Besides that, eMIOS200 architecture uses Dedicated Channels which
perform specific functions not included in MIOS inheritance.
Figure 18-1 shows the block diagram of the configurable eMIOS200 block.
BIU
Interrupt signals
Slave bus signals
Global signals
DMA interface signals
all
[D]
submodules
IIB
Counter Buses
(Time bases)
................
system clock
Clock
Prescaler
Internal counter clock enable
(Clock sent to all channels which
support in internal counter)
[A]
[C]
see note 1
CH[23]
ipp_obe_emios_ch[23]
EMIOSO[23]
EMIOSI[23]
emios_flag_out[23]
CH[16]
ipp_obe_emios_ch[16]
EMIOSO[16]
EMIOSI[16]
emios_flag_out[16]
ch[15]
ipp_obe_emios_ch[15]
EMIOSO[15]
EMIOSI[15]
emios_flag_out[15]
Counter Buses
(Time bases)
................
CH[8]
Output disable control Bus
enhanced Modular Input/Output System
Notes: 1. Connection between UC[n-1] and UC[n]
necessary to implement QDEC mode
Output Disable
Input[0:3]
Figure 18-1. eMIOS200 block diagram
ipp_obe_emios_ch[8]
EMIOSO[8]
EMIOSI[8]
emios_flag_out[8]
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
18-1