PXD20RM Datasheet, PDF (1562/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

47.2.3.13 VID_SIZE
offset 0x30
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
LINEC
W
Reset 0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
PIXELC
W
Reset 0
0
0
0
0
0
1
0
1
1
0
1
0
0
0
0
= Unimplemented or Reserved
Figure 47-14. VID_SIZE Register
Table 47-15. VID_SIZE Fields
Field
LINEC
PIXELC
Description
Expected number of lines in each output video frame after down scaling.
Expected number of pixels in each output video line after down scaling. It shall be multiply of 2 in 32-bit
output mode, and multiply of 4 in 16-bit output mode.
47.2.3.14 LUT_ADDR
Offset 0x34
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
ADDR
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 47-15. LUT_ADDR Register
Field
ADDR
Table 47-16. LUT_ADDR Fields
Description
Current address pointer of the B/C adjust look-up-table. Value of this register increments (by 4)
automatically at the end of each LUT_DATA write operation. This function allows fast update to the
whole look-up-table, to the table of one color component, or even to any random field of the table.
Note: LUT_ADDR reflects correct address only when clock of B/C adjust block is valid.
47-14
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor