PXD20RM Datasheet, PDF (834/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Field
SACC
Table 21-13. PFSACC field descriptions
Description
Supervisor Access Control. This bit field defines supervisor/user mode access control for each sector within
the main flash array.
0 Flash array sector n can be accessed in both user and supervisor mode.
1 Flash array sector n can be accessed only in supervisor mode. An attempted user mode access is
terminated with an AHB error response. If the requesting bus master is the processor core, the ERROR
response typically generates an instruction abort or data abort exception.
The mapping of this bit field to the main flash array is defined in Table 21-14
This field is initialized by hardware reset to the value contained in address 0x3E08 of the shadow block of the
flash array. An erased or unprogrammed flash sets this field to 0xFFFF_FFFF.
Table 21-14. {S,D}ACC Register to Flash Array Mapping
Register Bit
xACC[0]
xACC[1]
xACC[2]
xACC[3]
xACC[4]
xACC[5]
xACC[6]
xACC[7]
xACC[8]
xACC[9]
xACC[10]
xACC[11]
xACC[12]
xACC[13]
xACC[14]
xACC[15]
xACC[16]
xACC[17]
xACC[18]
xACC[19]
xACC[20]
xACC[21]
xACC[22]
xACC[23]
xACC[24]
xACC[25]
xACC[26]
xACC[27]
Starting Flash
Array Address
0x00_0000
0x00_4000
0x00_8000
0x00_C000
0x01_0000
0x01_4000
0x01_8000
0x01_C000
0x02_0000
0x02_4000
0x02_8000
0x02_C000
0x03_0000
0x03_4000
0x03_8000
0x03_C000
0x04_0000
0x08_0000
0x0C_0000
0x10_0000
0x14_0000
0x18_0000
0x1C_0000
0x20_0000
0x24_0000
0x28_0000
0x2C_0000
0x30_0000
Sector Size
16 KB
16 KB
16 KB
16 KB
16 KB
16 KB
16 KB
16 KB
16 KB
16 KB
16 KB
16 KB
16 KB
16 KB
16 KB
16 KB
256 KB
256 KB
256 KB
256 KB
256 KB
256 KB
256 KB
256 KB
256 KB
256 KB
256 KB
256 KB
21-22
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor