PXD20RM Datasheet, PDF (1348/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

39.6.2.21 FIFO WaterMark (FIFOWM)
The FIFOWM register configures the watermark of the FIFOs.
SGM Register Base + 0x00C8
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
WMCH3
W
WMCH2
Reset 1
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
WMCH1
W
WMCH0
Reset 1
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
Figure 39-22. FIFO WaterMark Register (FIFOWM)
Table 39-25. FIFO WaterMark Register 2
Field
Description
31-24
WMCH3
23-16
WMCH2
16-8
WMCH1
7-0
WMCH0
FIFO WaterMark for Channel 3.
FIFO WaterMark for Channel 2.
FIFO WaterMark for Channel 1.
FIFO WaterMark for Channel 0.
39.6.2.22 FIFO Read Pointer (FIFORP)
The FIFORP register contains the current FIFO read pointers. Any write to FRPCHx will clear/flush the
FIFO of the channel, including the read/write pointer and all the FIFO flags. Any 32-bit write to the
FIFORP will clear/flush the entire datapath/pipeline of the SGM.
SGM Register Base + 0x00CC
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
FRPCH3
FRPCH2
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
FRPCH1
FRPCH0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 39-23. FIFO Read Pointer (FIFORP)
39-24
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor