PXD20RM Datasheet, PDF (420/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Table 11-60. Data layout for BGRA8888
Address
offset
0x00
0x08
[0:7]
B0
B2
[8:15]
G0
G2
[16:23]
R0
R2
[24:31]
A0
A2
[0:7]
B1
B3
[8:15]
G1
G3
[16:23]
R1
R3
[24:31]
A1
A3
Table 11-61. Data layout for YCbCr422 format¹
Address
offset
[0:7]
[8:15]
[16:23]
[24:31]
[0:7]
[8:15]
[16:23]
[24:31]
0x00
Cb0
Y0
Cr0
Y1
Cb2
Y2
Cr2
Y3
0x08
Cb4
Y4
Cr4
Y5
Cb6
Y6
Cr6
Y7
1 _{The YCbCr422 format encodes chroma information across two pixels. Therefore, the chroma values apply to the even pixel}
denoted in the table and its adjacent odd pixel.
Address
offset
0x00
0x08
[0:7]
B0
R2
Table 11-62. Data layout for 24 bpp
[8:15]
G0
B3
[16:23]
R0
G3
[24:31]
B1
R3
[0:7]
G1
B4
[8:15]
R1
G4
[16:23]
[24:31]
B2
G2
R4
B5
For 16 bpp, data expected is in the form of RGB565, ARGB1555, ARGB4444, or APAL8.
Table 11-63. Generic data layout for 16 bpp
Address
offset
[0:7]
[8:15]
[16:23]
[24:31]
[0:7]
[8:15]
[16:23]
[24:31]
0x00
0x08
pixel0[15:8] pixel0[7:0] pixel1[15:8] pixel1[7:0] pixel2[15:8] pixel2[7:0] pixel3[15:8] pixel3[7:0]
pixel4[15:8] pixel4[7:0] pixel5[15:8] pixel5[7:0] pixel6[15:8] pixel6[7:0] pixel7[15:8] pixel7[7:0]
Address
offset
0x00
0x04
[0:4]
R0
R2
Table 11-64. Data layout for RGB565 format
[5:10]
G0
G2
[11:15]
B0
B2
[16:20]
R1
R3
[21:26]
G1
G3
[27:31]
B1
B3
Address
offset
[0]
0x00
A0
0x04
A2
Table 11-65. Data layout for ARGB1555 format
[1:5]
[6:10]
[11:15]
[16]
[17:21]
R0
G0
B0
A1
R1
R2
G2
B2
A3
R3
[22:26]
G1
G3
[27:31]
B1
B3
11-86
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor