PXD20RM Datasheet, PDF (1550/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Table 47-1. VIU2 memory map (continued)
Address offset
Register
0x08
0x0c
0x10
0x14
0x18
0x1c
0x20
0x24
0x28
0x2c
0x30
0x34
0x38
Chroma Coefficients For Red Matrix (CHROMA_RED)
Chroma Coefficients For Green Matrix (CHROMA_GREEN)
Chroma Coefficients For Blue Matrix (CHROMA_BLUE)
Base Address Of Every Field/Frame Of Picture In Memory (DMA_ADDR)
Horizontal DMA Increment (DMA_INC)
Input Video Pixel and Line Count (INVSZ)
High IPM Request Priority Alarm (HPALRM)
Programable Alpha Value (ALPHA)
Down Scaling Factor At Horizonal Direction (HFACTOR)
Down Scaling Factor At Vertical Direction (VFACTOR)
Down Scaling Destination Pixel and Line Count (VID_SIZE)
B/C Adjust Look-up-table Current Address (LUT_ADDR)
B/C Adjust Look-up-table Data Entry (LUT_DATA)
Access
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Location
on page 47-8
on page 47-9
on page 47-9
on page 47-10
on page 47-10
on page 47-11
on page 47-12
on page 47-12
on page 47-13
on page 47-13
on page 47-14
on page 47-14
on page 47-15
47.2.2 Register Summary
Table 47-2 shows the VIU2 register summary table.
Table 47-2. VIU2 Register Summary
Name
0x00
SCR
Ox04
LUMA_COMP
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
FIEL
R
MO
DE3
2BIT
RO DIT
UND HER
_ON _ON
D_N
O
DM
A_A
CT
SCA
LER
_EN
RGB
_EN
BC_
EN
MO
DE4
44
ERR
OR_
IRQ
DM
A_E
ND_
IRQ
VST
ART
_IR
Q
HSY
NC_
IRQ
VSY
NC_
IRQ
FIEL
D_I
RQ
W
w1c w1c w1c w1c w1c w1c
R
W
ECC
_EN
ERR
OR_
EN
DM
A_E
ND_
EN
VST
ART
_EN
HSY
NC_
EN
VSY
NC_
EN
FIEL
D_E
N
ERROR_CODE
FORMAT_CTRL
SOF
T_R
ESE
T
R
Y_RED[9:0]
W
Y_GREEN[9:5]
R
Y_GREEN[4:0]
W
Y_BLUE[9:0]
47-2
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor