PXD20RM Datasheet, PDF (814/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Port 0
(CPU Instruction)
System
bus
System
bus
Port 1
Platform
Flash
Controller
(PFLASH2P)
V_SS V_FLASH V_DD
Flash memory module
Flash memory
interface
(MI)
Control/status
registers
Flash core
(FC)
Slave
bus
Figure 21-1. Flash system block diagram
21.1.2 Flash memory block segmentation
The flash memory core has three address spaces. The low-address space is 256 KB. The mid-address space
is also 256 KB. The high-address space is 1.5 MB. The 256 KB of low memory is implemented using eight
16 KB blocks and two 64 KB blocks. The mid-address memory is implemented using two 128 KB blocks.
The high memory is implemented using three 512 KB blocks.
Figure 21-2 shows the segmentation for the flash memory on PXD20.
21-2
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor