PXD20RM Datasheet, PDF (375/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Table 11-23. Threshold Register Field Descriptions
Field
Description
6–15
LS_BF_VS
Lines before VSYNC threshold value. The LS_BF_VS status flag (in INT_STATUS) is set this
number of lines before the VSYNC signal is asserted.
16–23
Output buffer high threshold (in pixels). When the output buffer exceeds this value the datapath
OUT_BUF_HIGH clock is suspended.
24–31
Output buffer filling low Threshold (in pixels).This value is used to generate the underrun
OUT_BUF_LOW exception (UNDRUN in INT_STATUS).
11.3.4.19 Interrupt Status Register (INT_STATUS)
Figure 11-22 indicates the interrupt status register. See Section 11.5.4, Interrupt generation, for a
description of how the DCU3 collects interrupt events into different source groups.
Offset: 0x1EC
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
R
000000000000
W
w1c w1c w1c w1c
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
0
00
W
w1c
Reset 0 0 0
w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c
0000000000000
Figure 11-22. Interrupt Status Register (INT_STATUS)
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
11-41