PXD20RM Datasheet, PDF (1027/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

UART RX buffer (FIFO mode)
TIMEOUT config
Set RXEN
Enables DMA RX channel request
(DMAERQH, DMAERQL)
False
!RFE & DMA_REN ?
True
True
TIMEOUT restart
DMA Rx transfer (Req/Ack) from
UART Rx FIFO to RAM area
DMA Rx
(major loop)
done ?
False
False
False
DMA Rx
(minor loop)
done ?
True
!RFE ?
False
TIMEOUT ?
True
Set TIMEOUT flag
True
Figure 27-54. FSM to control the DMA RX interface (UART node)
The TCD settings (typical case) are shown in Table 27-50. All other TCD fields = 0. The minor loop
transfers a single byte/half-word as soon an entry is available in the Rx FIFO. A new software reset bit is
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
27-71