PXD20RM Datasheet, PDF (1219/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Table 35-3. QuadSPI memory map (continued)
Address
Register name
QSPI_BASE+0x160 Flag Register (QSPI_SFMFR)
QSPI_BASE+0x164 Interrupt and DMA Request Select and Enable Register (QSPI_SFMRSER)
QSPI_BASE+0x168 Reserved
–
QSPI_BASE+0x1FC
QSPI_BASE+0x200 RX Buffer Data Registers 0–31 (QSPI_RBDR0–QSPI_RBDR31)
–
QSPI_BASE+0x27C
Location
on page 35-21
on page 35-23
on page 35-25
35.4.2 Serial Flash Address Assignment
In Table 35-4 below it is noted how the different access modes are related to the address specified for the
next SFM Command. Note that this address assignment is valid for IP Commands as well as AHB
Command. For IP Commands it is the value to be programmed into the QSPI_SFAR register, for AHB
Commands it is the address accessed via the AHB bus.
Table 35-4. Serial Flash Address Assignment
Address
0x7000_0000 ... 0x77FF_FFFF
(128 MB)
0x7800_0000 ... 0x7FFF_FFFF
(128 MB)
0x8000_0000 ... 0X8FFF_FFFF
(256 MB)
Access Mode
Individual Flash Mode - Flash A only
Individual Flash Mode - Flash B only
Parallel Flash Mode - Flash A and B in parallel
NOTE
Any read access to non-implemented addresses will provide undefined
results.
The address space available for each single flash device in 24-bit addressing
mode is limited to 3 bytes corresponding to 16 MB address space. In 32-bit
addressing mode this is extended to 4bytes, allowing the maximum of 128
MB to be addressed. It is within the responsibility of the user not to exceed
beyond the physically available addresses of the serial flash attached to the
QuadSPI module.
Parallel Flash Mode is valid only for commands related to data read from
the serial flash. Any IP Command other than data read in Parallel Flash
Mode will result in the assertion of the QSPI_SFMFR[IUEF] flag and any
AHB Command other than data read in Parallel Flash Mode will result in
the assertion of the QSPI_SFMFR[ABCEF] flag, see Table 35-43 and
Table 35-47 for the related commands.
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
35-9