PXD20RM Datasheet, PDF (1024/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

UART TX buffer (FIFO mode)
Set TXEN
True
Enables DMA TX channel request
(DMAERQH, DMAERQL)
False
!TFF & DMA_TEN ?
True
DMA Tx transfer (Req/Ack) from
RAM area to UART Tx FIFO
False
DMA Tx
(major loop)
done ?
False
DMA Tx
(minor loop)
done ?
True
False
True
!TFF ?
Figure 27-52. FSM to control the DMA TX interface (UART node)
The TCD settings (typical case) are shown in Table 27-49. All other TCD fields = 0. The minor loop
transfers a single byte/half-word as soon a free entry is available in the Tx FIFO.
Table 27-49. TCD settings (UART node, TX mode)
TCD Field
Value
8-bit data
16-bit data
Description
CITER[14:0]
M
BITER[14:0]
M
Multiple iterations for the “major” loop
Multiple iterations for the “major” loop
27-68
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor