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PXD20RM Datasheet, PDF (594/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller | |||
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Address: Base + 0x0014
Access: User write-only
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
R0
W
Reset 0
Field
CMD
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CMD
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 13-12. Compact Command Register (DRAMC_CCMD)
Table 13-11. DRAMC_CCMD field descriptions
Description
The compact command register gives the option to send commands to the DRAM using 16-bit writes.
See Table 13-12.
Table 13-12. DRAMC_CCMD register options
CMD[15:14]
Description
00
Write DRAM attributes and wait (wait time = wait time till next command) Wait is executed
after writing attributes.
⢠CKE = CMD[13]
⢠Self Ref En = CMD[12]
⢠CLK ON = CMD[11]
⢠CMD MODE = CMD[10]
⢠If (CMD[7] == 1âb1)
⢠Wait time = (CMD[6:0] à 512) dram clock periods
Or
⢠Wait time = (CMD[6:0] à 32) dram clock periods
01
DRAM command
⢠DRAM_CS = CMD[12]
⢠DRAM_RAS = CMD[11]
⢠DRAM_CAS = CMD[10]
⢠DRAM_WEB = CMD[9]
⢠DRAM_BA[2:0] = CMD[8:6]
⢠DRAM_ADDRESS[10] = CMD[5]
⢠if(CMD[4] == 1âb1) turn off CKE DRAM attribute bit1
1x
DRAM set mode registers
⢠DRAM_CS = 0
⢠DRAM_RAS = 0
⢠DRAM_CAS = 0
⢠DRAM_WEB = 0
⢠DRAM_ADDRESS[13] = 0
⢠DRAM_BA[2] = 0
⢠DRAM_ADDRESS[12:0] = CMD[12:0]
⢠DRAM_ADDRESS[14:13] = CMD[14:13]
1 CKE is turned off the clock cycle when sending the requested command to the DRAM.
13-14
PXD20 Microcontroller Reference Manual, Rev. 1
PreliminaryâSubject to Change Without Notice
Freescale Semiconductor
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