PXD20RM Datasheet, PDF (339/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

11.2 External signal description
11.2.1 Overview
The DCU3 has up to 22 input signals and up to 30 output signals. See Figure 11-2. The choice of signals
used depends on the configuration of the DCU3. All active signals must be enabled by configuring the
appropriate PCR registers in the SIUL module.
If required, the DCU3 output signals can be configured to drive a panel which does not have an embedded
timing controller by enabling the on-chip TCON module.
Parallel Data Interface
PDI_PCLK
PDI[17:0]
PDI_VSYNC
PDI_HSYNC
PDI_DE
DCU3 Top Level
Display Interface
DCU_PCLK
DCU_VSYNC
DCU_HSYNC
DCU_CSYNC (not used)
DCU_DE
DCU_R[7:0], DCU_G[7:0], DCU_B[7:0]
DCU_TAG
Figure 11-2. External signals
11.2.2 Detailed signal descriptions
Table 11-1. Detailed signal descriptions
Signal
PDI_PCLK
PDI_VSYNC
PDI_HSYNC
PDI_DE
PDI[17:0]
DCU_PCLK
DCU_VSYNC
DCU_HSYNC
DCU_TAG
Direction
Description
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
Parallel Data Interface (Camera Interface)
Clock for the parallel data from the input video data
Vertical sync to indicate the start of new frame for the display
Horizontal sync to indicate the start of new line for the display
Data Enable for the camera data input
18-bit parallel input data for the display
Display Interface
Pixel clock used to drive the display panel
Vertical sync signal, indicating the beginning of a new frame
Horizontal sync signal, indicating the beginning of a new line
When high, this signal indicates that the pixel is tagged and an application can
calculate CRC externally on this pixel.
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
11-5