PXD20RM Datasheet, PDF (1469/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

— Edge detection
• System configuration
— Pad configuration control
• Special function control
— DDR pad configuration
— RSDS pad configuration
— Nexus pad configuration
43.4 External signal description
Most device pads support multiple device functions. Pad configuration registers are provided to enable
selection between GPIO and other signals. These other signals, also referred to as alternate functions, are
typically peripheral functions.
GPIO pads are grouped in “ports,” with each port containing up to 16 pads. With appropriate
configuration, all pins in a port can be read or written to in parallel with a single R/W access.
NOTE
In order to use GPIO port functionality, all pads in the port must be
configured as GPIO rather than as alternate functions.
43.4.1 Detailed signal descriptions
43.4.1.1 General-purpose I/O pins (GPIO[0:184])
The GPIO pins provide general-purpose input and output function. The GPIO pins are generally
multiplexed with other I/O pin functions. Each GPIO input and output is separately controlled by an input
(GPDIn_n) or output (GPDOn_n) register.
43.4.1.2 External interrupt request input pins (EIRQ[0:23])¹
The EIRQ[0:23] are connected to the SIU inputs. Rising or falling edge events are enabled by setting the
corresponding bits in the SIU_IREER or the SIU_IFEER register.
Table 43-1 lists the external interrupt pins used by the SIUL.
1. EIRQ[0:15] in the 176-pin package; EIRQ[0:18] in the 208-pin package; EIRQ[0:23] in the 416-pin package
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
43-3