PXD20RM Datasheet, PDF (1200/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

FIRC
VREG
power
domains
MC_PCU
Registers
Platform Interface
Power Domain
State Machines
MC_ME
CPU
WKPU
mapped
peripheral
Figure 34-1. MC_PCU block diagram
34.1.2 Features
The MC_PCU includes the following features:
• Support for 3 power domains
• Support for device modes RESET, DRUN, SAFE, TEST, RUN0…3, HALT, STOP, and
STANDBY (for further mode details, please see the MC_ME chapter)
• Power states updating on each mode change and on system wakeup
• A handshake mechanism for power state changes thus guaranteeing operable voltage
• Maps the VREG registers to the MC_PCU address space
34.2 External Signal Description
The MC_PCU has no connections to any external pins.
34-2
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor