PXD20RM Datasheet, PDF (510/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Table 12-32. PARR_ERR_STATUS field descriptions (continued)
Field
Description
RLE_ERR
L1_PARR_ERR
L0_PARR_ERR
Error signal to indicate that more than one layer has RLE mode enabled.
Interrupt occurs whenever there is an error in layer 1.
1’b0: Parameter error is not set
1’b1: Parameter error is set
Interrupt occurs whenever there is an error in layer 0.
1’b0: Parameter error is not set
1’b1: Parameter error is set
12.3.4.29 MASK_PARR_ERR_STATUS register
Figure 12-39 shows the mask register for parameter error status register.
Offset 0x230
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15
R0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1
Figure 12-39. Mask parameter error status register (MASK_PARR_ERR_STATUS)
Table 12-33. MASK_PARR_ERR_STATUS field descriptions
Field
M_RLE_ERR
M_HWC_ERR
M_SIG_ERR
Mask the interrupt
1’b1: mask the interrupt
1’b0: Do not mask interrupt
Mask the interrupt
1’b1: mask the interrupt
1’b0: Do not mask interrupt
Mask the interrupt
1’b1: mask the interrupt
1’b0: Do not mask interrupt
Description
12-48
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor