PXD20RM Datasheet, PDF (1117/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

30.6.1 Nexus Debug Interface Registers
Table 30-2 shows the NDI registers by client select and index values. OnCE register addressing is
documented in Chapter 24, IEEE 1149.1 Test Access Port Controller (JTAGC).
Table 30-2. Nexus Debug Interface Registers
Client Select
Index
Register
0bxxxx
0bxxxx
Client-Independent Registers
0
Device ID (DID)¹
127
Port configuration register (PCR)¹
e200z4d Control/Status Registers
0b0000
2
e200z4d development control1 (DC1)
0b0000
3
e200z4d development control2 (DC2)
0b0000
4
e200z4d development status (DS)
0b0000
7
Read/write access control/status (RWCS)
0b0000
9
Read/write access address (RWA)
0b0000
10
Read/write access data (RWD)
0b0000
11
e200z4d watchpoint trigger (PPC_WT)
1 _{Implemented in NPC block. All other registers implemented in e200z4d Nexus3 block.}
30.6.2 Register Description
This section lists the NDI registers and describes the registers and their bit fields.
30.6.2.1 Nexus Device ID Register (DID)
The NPC device identification register, shown in Figure 30-3, allows the part revision number, design
center, part identification number, and manufacturer identity code of the device to be determined through
the auxiliary output port, and serially through TDO. This register is read-only.
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
30-5