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PXD20RM Datasheet, PDF (139/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller
Table 4-8. SWT_IR Field Descriptions
Field
TIF
Description
Time-out Interrupt Flag. The flag and interrupt are cleared by writing a 1 to this bit. Writing a 0 has no
effect.
0 = No interrupt request.
1 = Interrupt request due to an initial time-out.
4.2.6.3 SWT Time-Out Register (SWT_TO)
The SWT Time-Out (SWT_TO) register contains the 32-bit time-out period. This register is read-only if
either the SWT_CR.HLK or SWT_CR.SLK bits are set.
Offset 0x008
Access: Read/Write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
WTO
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0
Figure 4-15. SWT Time-Out Register (SWT_TO)
The default counter value (SWT_TO_RST) is 1920 (0x0000_0780 hexadecimal) which corresponds to
15 ms with a 128 kHz clock.
Table 4-9. SWT_TO Register Field Descriptions
Field
Description
WTO Watchdog time-out period in clock cycles. An internal 32-bit down counter is loaded with this value or
0x100 which ever is greater when the service sequence is written or when the SWT is enabled.
4.2.6.3.1 SWT Window Register (SWT_WN)
The SWT Window (SWT_WN) register contains the 32-bit window start value. This register is cleared on
reset. This register is read only if either the SWT_CR.HLK or SWT_CR.SLK bits are set.
Offset 0x00C
Access: Read/Write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 1 19 20 21 22 23 24 25 26 27 28 29 30 31
8
R
WST
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 4-16. SWT Window Register (SWT_WN)
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
4-15