PXD20RM Datasheet, PDF (307/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Table 10-14. DSPIx_PUSHR Field Descriptions
Field
Description
0
CONT
Continuous peripheral chip select enable. Selects a continuous selection format. The bit is used in SPI
master mode. The bit enables the selected CS signals to remain asserted between transfers. Refer to
Section 10.9.5.5, Continuous Selection Format, for more information.
1–3
CTAS
[0:2]
0 Return peripheral chip select signals to their inactive state between transfers
1 Keep peripheral chip select signals asserted between transfers
Clock and transfer attributes select. Selects which of the DSPIx_CTARs is used to set the transfer
attributes for the SPI frame. In SPI slave mode, DSPIx_CTAR0 is used. The following table shows how
the CTAS values map to the DSPIx_CTARs. There are eight DSPIx_CTARs in the device DSPI
implementation.
Note: Use in SPI master mode only.
CTAS
000
001
010
011
100
101
110
111
Use Clock and Transfer
Attributes from
DSPIx_CTAR0
DSPIx_CTAR1
DSPIx_CTAR2
DSPIx_CTAR3
DSPIx_CTAR4
DSPIx_CTAR5
DSPIx_CTAR6
DSPIx_CTAR7
4
End of queue. Provides a means for host software to signal to the DSPI that the current SPI transfer is
EOQ the last in a queue. At the end of the transfer the EOQF bit in the DSPIx_SR is set.
0 The SPI data is not the last data to transfer
1 The SPI data is the last data to transfer
Note: Use in SPI master mode only.
5
Clear SPI_TCNT. Provides a means for host software to clear the SPI transfer counter. The CTCNT bit
CTCNT clears the SPI_TCNT field in the DSPIx_TCR. The SPI_TCNT field is cleared before transmission of the
current SPI frame begins.
6–7
8–9
10–12
0 Do not clear SPI_TCNT field in the DSPIx_TCR
1 Clear SPI_TCNT field in the DSPIx_TCR
Note: Use in SPI master mode only.
Reserved.
Reserved, but implemented. These bits are writable, but have no effect.
Reserved.
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
10-21