PXD20RM Datasheet, PDF (331/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

9. Clear transfer count either by setting CTCNT bit in the command word of the first entry in the new
queue or via CPU writing directly to SPI_TCNT field in the DSPIx_TCR.
10. Enable DMA channel by enabling the DMA enable request for the DMA channel assigned to the
DSPI TX FIFO, and RX FIFO by setting the corresponding DMA set enable request bit.
11. Enable serial transmission and serial reception of data by clearing the EOQF bit.
10.10.2 Baud Rate Settings
Table 10-26 shows the baud rate that is generated based on the combination of the baud rate prescaler PBR
and the baud rate scaler BR in the DSPIx_CTARs. The values are calculated at a 64 MHz system frequency
with DBR = 0.
Table 10-26. Baud Rate Values
Baud Rate Divider Prescaler Values
(DSPI_CTAR[PBR])
2
3
5
7
2
16.0 MHz 10.7 MHz 6.4 MHz 4.57 MHz
4
8 MHz
5.33 MHz 3.2 MHz 2.28 MHz
6
5.33 MHz 3.56 MHz 2.13 MHz 1.52 MHz
8
4 MHz
2.67 MHz 1.60 MHz 1.15 MHz
16
2 MHz
1.33 MHz 800 kHz
571 kHz
32
1 MHz
670 kHz
400 kHz
285 kHz
64
128
256
512
1024
2048
4096
500 kHz
250 kHz
125 kHz
62.5 kHz
31.2 kHz
15.6 kHz
7.81 kHz
333 kHz
166 kHz
83.2 kHz
41.6 kHz
20.8 kHz
10.4 kHz
5.21 kHz
200 kHz
100 kHz
50 kHz
25 kHz
12.5 kHz
6.25 kHz
3.12 kHz
142 kHz
71.7 kHz
35.71 kHz
17.86 kHz
8.96 kHz
4.47 kHz
2.23 kHz
8192 ^{3.90 kHz}
2.60 kHz
1.56 kHz
1.11 kHz
16384 ^{1.95 kHz}
1.31 kHz
781 Hz
558 Hz
32768 ^{979 Hz}
653 Hz
390 Hz
279 Hz
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
10-45