PXD20RM Datasheet, PDF (694/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Table 17-4. DMACHMUX request assignments (continued)
DMA requesting module
DMACHMUX source number
(ipd_ref_peripher[N_periphs:1])
ALWAYS requestors
DMA MUX Source #58
ALWAYS requestors
DMA MUX Source #59
ALWAYS requestors
DMA MUX Source #60
ALWAYS requestors
DMA MUX Source #61
ALWAYS requestors
DMA MUX Source #62
ALWAYS requestors
DMA MUX Source #63
1 _{Configuring a DMA channel to select source 0 or any reserved sources will disable that DMA}
channel.
17.4 Functional description
This section provides a functional description of the DMA Channel Mux. The primary purpose of the
DMA Channel Mux is to provide flexibility in the system’s use of the available DMA channels. As such,
configuration of the DMA Mux is intended to be a static procedure done during execution of the system
boot code. However, if the procedure outlined in Section 17.5.3, Enabling and configuring sources, is
followed, the configuration of the DMA Channel Mux may be changed during the normal operation of the
system.
Functionally, the DMA Channel Mux channels may be divided into two classes: Channels, which
implement the normal routing functionality plus periodic triggering capability, and channels, which
implement only the normal routing functionality.
17.4.1 DMA Channels with periodic triggering capability
Besides the normal routing functionality, the first 8 channels of the DMA Mux provide a special periodic
triggering capability that can be used to provide an automatic mechanism to transmit bytes, frames or
packets at fixed intervals without the need for processor intervention. The trigger is generated by the
Periodic Interrupt Timer (PIT); as such, the configuration of the periodic triggering interval is done via
configuration registers in the PIT. Please refer to Chapter 32, Periodic Interrupt Timer (PIT), for more
information on this topic.
Table 17-5 shows the mapping of PIT channels to DMA channels for triggering.
Table 17-5. PIT-DMA channel mapping
PIT channel number
DMACHMUX channel number
for triggering
0
0
1
1
2
2
3
3
17-6
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor