PXD20RM Datasheet, PDF (1447/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Table 42-7. DCNT Register Field Description
Field
Description
15-0 DCNT - Down Counter value. This register represents the actual value of the down counter in unsigned
format. Refer to the Functional Description of the integrator for further details.
42.3.3.5 Blanking Counter Load Register (BLNCNTLD)
Figure 42-7 below describes the fields of the blanking counter load (BLNCNTLD) register:
Offset 0x08
Access: User read/write
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
R
BLNCNTLD
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 42-7. SSD Blanking Counter Load Register (BLNCNTLD)
The function of the BLNCNTLD register bits is shown in Table 42-8.
Table 42-8. BLNCNTLD Register Field Description
Field
Description
15-0
BLNCNTLD - Blanking Count Load value. This register is programmed with the number of down counter
periods belonging to the blanking phase of the following BISs. Number format is unsigned. Refer to the
Functional Description of the integrator for further details.
Programming all 0’s into the BLNCNTLD register bits disables blanking completely.
42.3.3.6 Integration Counter Load Register (ITGCNTLD)
Figure 42-8 below describes the fields of the integration counter load (ITGCNTLD) register:
Offset 0x0A
Access: User read/write
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
R
ITGCNTLD
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 42-8. SSD Integration Counter Load Register (ITGCNTLD)
The function of the ITGCNTLD register bits is shown in Table 42-9.
PXD20 Microcontroller Reference Manual, Rev. 1
42-9