PXD20RM Datasheet, PDF (974/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

bits is 1. An odd parity is cleared in this case. Parity 0 forces a zero logical value. Parity 1 forces a high
logical value.
Byte Field
Start
bit ^{D0 D1 D2 D3 D4 D5 D6 D7}
D8
Stop
bit
- Parity bit
Figure 27-15. UART mode 9-bit data frame
27.9.1.3 16-bit data frame
The 16-bit UART data frame is shown in Figure 27-16. The 16th bit can be a data or a parity bit. Parity
(even, odd, 0, or 1) can be selected by the UARTCR[PC] field. Parity 0 forces a zero logical value. Parity
1 forces a high logical value.
Byte Field
Start
bit ^{D0 D1 D2 ...}
...
D13 D14 D15
Stop
bit
- Data bit
- Parity bit
Figure 27-16. UART mode 16-bit data frame
27.9.1.4 17-bit data frame
The 17-bit UART data frame is shown in Figure 27-17. The 17th bit is the parity bit. Parity (even, odd, 0,
or 1) can be selected by the UARTCR[PC] field. Parity 0 forces a zero logical value. Parity 1 forces a high
logical value.
Byte Field
Start
bit ^{D0 D1 D2 ...}
D13 D14 D15 D16
Stop
bit
- Parity bit
Figure 27-17. UART mode 17-bit data frame
27.9.2 Buffer
The 8-byte buffer is divided into two parts — one for receiver and one for transmitter — as shown in
Table 27-5.
27-18
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor