PXD20RM Datasheet, PDF (722/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Table 18-17. UC MODE bits (continued)
MODE¹
mode of operation
1010010
1010011
Reserved
10101bb
Modulus Counter Buffered (Up/down counter)
10110b0
Output Pulse Width and Frequency Modulation Buffered
10110b1
to
10111b1
Reserved
11000b0
Output Pulse Width Modulation Buffered
1100001
to
1111111
Reserved
1 _{b = adjust parameters for the mode of operation. Refer to Section 18.7.1.1, UC Modes of Operation, for}
details.
18.6.2.9 eMIOS200 UC Status Register (CSR[n])
CSR[n] address: UC[n] base address + 0x10
0123456789
R OVR 0 0 0 0 0 0 0 0 0
W w1c
RESET: 0 0 0 0 0 0 0 0 0 0
10 11 12 13 14 15
000000
000000
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R OVF 0 0 0 0 0 0 0 0 0 0 0 0 UCIN UCO FLA
L
UT G
W w1c
w1c
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
= Unimplemented or reserved
Figure 18-12. eMIOS200 UC Status Register (CSR[n])
18-20
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor