PXD20RM Datasheet, PDF (136/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Table 4-5. SWT operation after reset (continued)
SWT_CR
[WEN]
MCU mode
CPU debug
active
SWT_CR
[FRZ]
SWT_CR
[STP]
SWT operation
1
Normal (MC_ME modes DRUN,
No
RUN0:3, HALT, SAFE)
Debug¹ (MC_ME modes DRUN,
Yes
RUN0:3, HALT, SAFE)
Yes
0 or 1
0
1
0 or 1
0 or 1
0 or 1
Running
Running
Halted
STOP (MC_ME mode STOP)
No
0 or 1
0
Running
No
0 or 1
1
Halted
0 or 1
STANDBY
No
No
No
Off
1 _{SWT Debug Mode occurs when the processor is stopped due to user specified debug criteria such as breakpoint.}
4.2.4 External signal description
The SWT module does not have any external interface signals.
4.2.5 Memory map and register description
The SWT programming model has six 32-bit registers. The programming model can only be accessed
using 32-bit (word) accesses. References using a different size are invalid. Other types of invalid accesses
include: writes to read only registers, incorrect values written to the service register when enabled,
accesses to reserved addresses and accesses by masters without permission. If the RIA bit in the SWT_CR
is set then the SWT generates a system reset on an invalid access otherwise a bus error is generated. If
either the HLK or SLK bits in the SWT_CR are set then the SWT_CR, SWT_TO and SWT_WN registers
are read only.
4.2.5.1 Memory map
The SWT memory map is shown in Table 4-6.
Table 4-6. SWT memory map
Address
offset
0x0000
0x0004
0x0008
0x000C
0x0010
0x0014
0x0018–
0x3FFF
Register name
SWT Control Register (SWT_CR)
SWT Interrupt Register (SWT_IR)
SWT Time-out Register (SWT_TO)
SWT Window Register (SWT_WN)
SWT Service Register (SWT_SR)
SWT Counter Output Register (SWT_CO)
Reserved
Location
on page 4-13
on page 4-14
on page 4-15
on page 4-15
on page 4-16
on page 4-16
4-12
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor