PXD20RM Datasheet, PDF (933/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Table 26-8. INTC Priority Select Register Address Offsets (continued)
INTC_PSRx_x
INTC_PSR68_71
INTC_PSR72_75
INTC_PSR76_79
INTC_PSR80_83
INTC_PSR84_87
INTC_PSR88_91
INTC_PSR92_95
INTC_PSR96_99
INTC_PSR100_103
INTC_PSR104_107
INTC_PSR108_111
INTC_PSR112_115
INTC_PSR116_119
Offset Address
0x0084
0x0088
0x008C
0x0090
0x0094
0x0098
0x009C
0x00A0
0x00A4
0x00A8
0x00AC
0x00B0
0x00B4
INTC_PSRx_x
INTC_PSR188_191
INTC_PSR192_195
INTC_PSR196_199
INTC_PSR200_203
INTC_PSR204_207
INTC_PSR208_211
INTC_PSR212_215
INTC_PSR216_219
INTC_PSR220_223
INTC_PSR224_227
INTC_PSR228_231
INTC_PSR232_235
INTC_PSR236_238
Offset Address
0x00FC
0x0100
0x0104
0x0108
0x010C
0x0110
0x0114
0x0118
0x011C
0x0120
0x0124
0x0128
0x012C
26.6 Functional description
The functional description involves the areas of interrupt request sources, priority management, and
handshaking with the processor.
NOTE
The INTC has no spurious vector support. Therefore, if an asserted
peripheral or software settable interrupt request, whose PRIn value in
INTC_PSR0_3–INTC_PSR236_238 is higher than the PRI value in
INTC_CPR, negates before the interrupt request to the processor for that
peripheral or software settable interrupt request is acknowledged, the
interrupt request to the processor still can assert or will remain asserted for
that peripheral or software settable interrupt request. In this case, the
interrupt vector will correspond to that peripheral or software settable
interrupt request. Also, the PRI value in the INTC_CPR will be updated
with the corresponding PRIn value in INTC_PSRn. Furthermore, clearing
the peripheral interrupt request’s enable bit in the peripheral or,
alternatively, setting its mask bit has the same consequences as clearing its
flag bit. Setting its enable bit or clearing its mask bit while its flag bit is
asserted has the same effect on the INTC as an interrupt event setting the
flag bit.
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
26-11