PXD20RM Datasheet, PDF (611/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

14.4.2.6 Lookup table alternate lower registers (ALUTL0–ALUTL4)
Offsets: 0xC8 (ALUTL0)
0xCC (ALUTL1)
0xD0 (ALUTL2)
0xD4 (ALUTL3)
0xD8 (ALUTL4)
read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
PRIO7
W
PRIO6
PRIO5
PRIO4
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
PRIO3
W
PRIO2
PRIO1
PRIO0
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 14-9. ALUTL registers
These registers contain the upper 8 entries of the look-up tables for channels 0 to 4, alternate table. All
registers contain identical fields. The content of these registers if the “alternate” table is enabled for the
particular LUT.
Table 14-8. ALUTL field descriptions
Field
PRIO7
PRIO6
PRIO5
PRIO4
PRIO3
PRIO2
PRIO1
PRIO0
Description
Priority setting if 7 ACK’s for own channel counted
Priority setting if 6 ACK’s for own channel counted
Priority setting if 5 ACK’s for own channel counted
Priority setting if 4 ACK’s for own channel counted
Priority setting if 3 ACK’s for own channel counted
Priority setting if 2 ACK’s for own channel counted
Priority setting if 1 ACK for own channel counted
Priority setting if 0 ACK’s for own channel counted
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
14-11