PXD20RM Datasheet, PDF (668/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Table 16-27. TCDn Word 7 (TCDn.{biter, control/status}) field descriptions (continued)
Name
bwc[0:1]
Description
Bandwidth control
Value
This two-bit field provides a mechanism to effectively
throttle the amount of bus bandwidth consumed by
the DMA. In general, as the DMA processes the inner
minor loop, it continuously generates read/write,
read/write, ... sequences until the minor count is
exhausted. This field forces the DMA to stall after the
completion of each read/write access to control the
bus request bandwidth seen by the platform’s
cross-bar arbitration switch. To minimize start-up
latency, bandwidth control stalls are suppressed for
the first two AHB bus cycles and after the last write of
each minor loop.
The dynamic priority elevation setting elevates the
priority of the DMA as seen by the cross-bar
arbitration switch for the executing channel. Dynamic
priority elevation is suppressed during the first two
AHB bus cycles.
major.linkch[0:5]
Link channel number
00 No DMA engine stalls
01 Dynamic priority elevation
10 DMA engine stalls for 4 cycles after each r/w
11 DMA engine stalls for 8 cycles after each r/w
if (TCD.major.e_link = 0) then
No channel-to-channel linking (or chaining) is
performed after the outer "major" loop counter is
exhausted.
else
After the "major" loop counter is exhausted, the DMA
engine initiates a channel service request at the
channel defined by major.linkch[5:0] by setting that
channel’s TCD.start bit.
done
Channel done
The value contained in major.linkch[5:0] must not
exceed the number of implemented channels.
This flag indicates the DMA has completed the outer
major loop. It is set by the DMA engine as the citer
count reaches zero; it is cleared by software, or the
hardware when the channel is activated.
active
Channel active
This bit must be cleared in order to write the
major.e_link or e_sg bits.
This flag signals the channel is currently in execution.
It is set when channel service begins, and is cleared
by the DMA engine as the inner minor loop completes
or if any error condition is detected.
16-30
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor