PXD20RM Datasheet, PDF (917/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

25.5.3.2 Interrupt Description
There are five types of internal interrupts in the I²C. The interrupt service routine can determine the
interrupt type by reading the Status Register.
I²C Interrupt can be generated on
• Arbitration Lost condition (IBAL bit set)
• Byte Transfer condition (TCF bit set)
• Address Detect condition (IAAS bit set)
• No Acknowledge from slave received when expected
• Bus Going Idle (IBB bit not set)
The I²C interrupt is enabled by the IBIE bit in the I²C Control Register. It must be cleared by writing ‘1’
to the IBIF bit in the interrupt service routine. The Bus Going Idle interrupt needs to be additionally
enabled by the BIIE bit in the IBIC register.
25.6 Initialization/Application Information
25.6.1 I²C Programming Examples
25.6.1.1 Initialization Sequence
Reset will put the I²C Bus Control Register to its default state. Before the interface can be used to transfer
serial data, an initialization procedure must be carried out, as follows:
1. Update the Frequency Divider Register (IBFD) and select the required division ratio to obtain SCL
frequency from system clock.
2. Update the I²C Bus Address Register (IBAD) to define its slave address.
3. Clear the IBDIS bit of the I²C Bus Control Register (IBCR) to enable the I²C interface system.
4. Modify the bits of the I²C Bus Control Register (IBCR) to select Master/Slave mode,
Transmit/Receive mode and interrupt enable or not. Optionally also modify the bits of the I²C Bus
Interrupt Config Register (IBIC) to further refine the interrupt behavior.
25.6.1.2 Generation of START
After completion of the initialization procedure, serial data can be transmitted by selecting the 'master
transmitter' mode. If the device is connected to a multi-master bus system, the state of the I²C Bus Busy
bit (IBB) must be tested to check whether the serial bus is free.
If the bus is free (IBB=0), the start condition and the first byte (the slave address) can be sent. The data
written to the data register comprises the slave calling address and the LSB, which is set to indicate the
direction of transfer required from the slave.
The bus free time (i.e., the time between a STOP condition and the following START condition) is built
into the hardware that generates the START cycle. Depending on the relative frequencies of the system
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
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