PXD20RM Datasheet, PDF (930/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Writing to the end-of-interrupt register signals the end of the servicing of the interrupt request. When the
INTC_EOIR is written, the priority last pushed on the LIFO is popped into INTC_CPR. An exception to
this behavior is described in Section 26.4.1.2, Hardware vector mode. The values and size of data written
to the INTC_EOIR are ignored. The values and sizes written to this register neither update the
INTC_EOIR contents or affect whether the LIFO pops. For possible future compatibility, write four bytes
of all 0s to the INTC_EOIR.
Reading the INTC_EOIR has no effect on the LIFO.
26.5.2.5 INTC Software Set/Clear Interrupt Registers
(INTC_SSCIR0_3–INTC_SSCIR4_7)
Offset: 0x0020
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R₀
0
0
0
0
0
0 CLR0 0
0
0
0
0
0
0 CLR1
W
SET0
SET1
Reset ₀
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R
W
Reset
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
0
0
0
0
0
0
0 CLR2 0
0
0
0
0
0
0 CLR3
SET2
SET3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 26-6. INTC Software Set/Clear Interrupt Register 0–3 (INTC_SSCIR[0:3])
Offset: 0x0024
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R₀
0
0
0
0
0
0 CLR4 0
0
0
0
0
0
0 CLR5
W
SET4
SET5
Reset ₀
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R
W
Reset
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
0
0
0
0
0
0
0 CLR6 0
0
0
0
0
0
0 CLR7
SET6
SET7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 26-7. INTC Software Set/Clear Interrupt Register 4–7 (INTC_SSCIR[4:7])
26-8
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor