PXD20RM Datasheet, PDF (885/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

24.5.2.1 Bypass Mode
When no test operation is required, the BYPASS instruction can be loaded to place the JTAGC into bypass
mode. While in bypass mode, the single-bit bypass shift register is used to provide a minimum-length
serial path to shift data between TDI and TDO.
24.5.2.2 TAP Sharing Mode
There are three selectable auxiliary TAP controllers that share the TAP with the JTAGC. Selectable TAP
controllers include the Nexus port controller (NPC) and PLATFROM. The instructions required to grant
ownership of the TAP to the auxiliary TAP controllers are ACCESS_AUX_TAP_NPC,
ACCESS_AUX_TAP_ONCE, ACCESS_AUX_TAP_TCU. Instruction opcodes for each instruction are
shown in Table 24-3.
When the access instruction for an auxiliary TAP is loaded, control of the JTAG pins is transferred to the
selected TAP controller. Any data input via TDI and TMS is passed to the selected TAP controller, and any
TDO output from the selected TAP controller is sent back to the JTAGC to be output on the pins. The
JTAGC regains control of the JTAG port during the UPDATE-DR state if the PAUSE-DR state was
entered. Auxiliary TAP controllers are held in RUN-TEST/IDLE while they are inactive.
For more information on the TAP controllers refer to Chapter 30, Nexus Development Interface (NDI).
24.6 External signal description
The JTAGC consists of four signals that connect to off-chip development tools and allow access to test
support functions. The JTAGC signals are outlined in Table 24-1.
Table 24-1. JTAG signal properties
Name
I/O
Function
Reset State
TCK¹
I
Test clock
Pull Up
TDI
I
Test data in
Pull Up
TDO
O
Test data out
High Z
TMS
I
Test mode select
Pull Up
1 _{In low power mode, TCk frequency should not be greater than 16 MHz or IRC.}
All 4 JTAG pins (TCK/TMS/TDI/TDO) are shared with GPIO pins, so that the software may configure
these pins as input/output by programming the appropriate registers.
To ensure the proper working of JTAG, these registers have a reset value such that these pins behave as
JTAG pins when the POR is lifted:
• TDI : input/pull-up
• TCK : Input/pull-up
• TMS : input/pull-up
• TDO : high-Z/pull-disabled
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
24-3