PXD20RM Datasheet, PDF (1279/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

(cnten & clksel== 2’b1
4-16 MHz OSCA
en
C.G.
CELL
(cnten & clksel== 2’b1
16 MHz FIRC
en
C.G.
CELL
(cnten & clksel== 2’b0
128 kHz SIRC
en
C.G.
CELL
(cnten & clksel== 2’b0
32 kHz OSCB
en
C.G.
CELL
0
0
C.G. ^{div 512 1}
CELL
en
C.G. ^{div 32 1}
CELL
en
div512en
32-bit counter
div32en
Figure 36-2. Clock gating for RTC clocks
36.3 Device-specific information
For this device:
• FXOSC, SXOSC, FIRC, and SIRC clocks are provided as counter clocks for the RTC. Default
clock on reset is SIRC divided by 4.
• The RTC will be reset on destructive reset, with the exception of software watchdog reset.
• The RTC provides a configurable divider by 512 to be optionally used when FIRC source is
selected.
36.4 Modes of operation
36.4.1 Functional mode
There are two functional modes of operation for the RTC: normal operation and low power mode. In
normal operation, all RTC registers can read or written and the input isolation is disabled. The RTC/API
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
36-3