PXD20RM Datasheet, PDF (1485/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Table 43-14. Peripheral input pin selection (continued)
PSMI register
SIUL address
offset
Peripheral input
Mapping of input pin to
peripheral input ¹
PSMI[45]
0x52D
EMIOS1[21]
0:PCR[73]
1:PCR[103]
2:PCR[142]
PSMI[46]
0x52E
EMIOS1[22]
0:PCR[114]
1:PCR[135]
2:PCR[152]
PSMI[47]
0x52F
EMIOS1[23]
0:PCR[48]
1:PCR[136]
2:PCR[153]
3:PCR[155]
PSMI[48]
0x530
I2C_SCL_1
0:PCR[1]
1:PCR[77]
2:PCR[132]
PSMI[49]
0x531
I2C_SDA_1
0:PCR[0]
1:PCR[74]
2:PCR[131]
PSMI[50]
0x532
LIN1_RXD
0:PCR[28]
1:PCR[78]
PSMI[51]
0x533
LIN2_RXD
0:PCR[128]
1:PCR[157]
2:PCR[163]
PSMI[52]
0x534
LIN3_RXD
0:PCR[150]
1:PCR[171]
PSMI[53]
0x535
EVTI
0:PCR[80]
1:EVTI
1 _{Connecting a peripheral input to a pad requires assigning both the PSMI value for the peripheral input}
and the pad assignment in the SIU_PCR register for that signal.
43.5.3.11 GPIO Pad Data Output Registers (GPDO0_3 - GPDO184)
These registers can be used to set or clear a single GPIO pad with byte access.
The GPIO pad data output registers are a group of 185 one-byte registers used to set or clear the logic value
on their associated pads. Each word contains four registers. The word beginning at Base + 0x0600 contains
GPDO0 - GPDO3, the word beginning at Base + 0x0604 contains GPDO3 - GPDO07, and so on.
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
43-19