PXD20RM Datasheet, PDF (1327/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

39.4 Block diagram
A block diagram of the SGM module is shown in Figure 39-1.
SGM bus clock
Registers buffer
Clock Select
Pre-scalers
CH0 CH1 CH2 CH3 resample PWM
DMA
Req 0-3
SGM Module
pwm_clk
FIFO-0
DDS0/SFC0
Vol-0
FIFO-1
DDS1/SFC1
Vol-1
FIFO-2
DDS2/SFC2
Vol-2
FIFO-3
Input Buffer
DDS3/SFC3
Channel
Vol-3
Volume
Control
resample-0
resample-1
resample-2
resample-3
SGM bus clock x 2
I2S configuration/status
signals
PWM
PWMOA
PWMO
I2S FIFO
34bit x 8
I2S Master
Figure 39-1. High Level Block Diagram of SGM
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
39-3