PXD20RM Datasheet, PDF (1139/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Table 31-7. Interrupt Enable (G12_IRQENABLE) Field Description
Field
Description
31–4
3
2
1
0
Reserved.
FBC done interrupt enable
FIFO full error interrupt enable
2D idle request interrupt enable
MH AXI error / MMU page fault interrupt enable
31.3.7 G12_IRQ_ACTIVE_CNT
Offset 0x4e0
Access: User read
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
FBC
ERROR
G2D
MH
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 31-8. Active interrupt counters (G12_IRQ_ACTIVE_CNT)
Table 31-8. Active interrupt counters (G12_IRQ_ACTIVE_CNT) Field Descriptions
Field
Description
31–24 FBC done interrupt counter
23–16 FIFO full error interrupt counter
15–8 2D idle request interrupt counter
7–0 MH AXI error / MMU page fault interrupt counter
31.3.8 G12_CLOCKEN
Offset 0x508
Access: User read/write
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R0
0
0
0
0
0
0
0
0
0
W
RESERVED
VG_ G2D_ BCA
L1L2 VGL3 CHE
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
Figure 31-9. Clock Enable (G12_CLOCKEN)
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
31-7