PXD20RM Datasheet, PDF (1352/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

SGM Register Base + 0x00D8
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R _{FLDE FLDE FLDE FLDE} 0
0
0
0 _{FLIE FLIE FLIE FLIE} 0
0
0
0
W ^{CH3 CH2 CH1 CH0}
CH3 CH2 CH1 CH0
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
R _FFIE
W ^CH3
14
FFIE
CH2
13
FFIE
CH1
12
FFIE
CH0
11
FEIE
CH3
10
FEIE
CH2
9
FEIE
CH1
8
FEIE
CH0
7
6
5
4
FOIE FOIE FOIE FOIE
CH3 CH2 CH1 CH0
3
FUIE
CH3
2
FUIE
CH2
1
FUIE
CH1
0
FUIE
CH0
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 39-26. SGM Interrupt Control Register for DMA and FIFO (SGMICDF)
Table 39-29. SGM Interrupt Control Register for DMA and FIFO
Field
Description
31
FIFO level DMA Request Enable for Channel 3.
FLDECH3 Enables a DMA service request when the FIFO level is below the watermark of channel 3.
30
FIFO level DMA Request Enable for Channel 2.
FLDECH2 Enables a DMA service request when the FIFO level is below the watermark of channel 2.
29
FIFO level DMA Request Enable for Channel 1.
FLDECH1 Enables a DMA service request when the FIFO level is below the watermark of channel 1.
28
FIFO level DMA Request Enable for Channel 0.
FLDECH0 Enables a DMA service request when the FIFO level is below the watermark of channel 0.
27-24 Reserved.
23
FIFO level interrupt Request Enable for Channel 3.
FLIECH3 Enables an interrupt request when the FIFO level is below the watermark of channel 3.
22
FIFO level interrupt Request Enable for Channel 2.
FLIECH2 Enables the interrupt request when the FIFO level is below the watermark of channel 2.
21
FIFO level interrupt Request Enable for Channel 1.
FLIECH1 Enables the interrupt request when the FIFO level is below the watermark of channel 1.
20
FIFO level interrupt Request Enable for Channel 0.
FLIECH0 Enables the interrupt request when the FIFO level is below the watermark of channel 0.
19-16 Reserved.
15
FIFO Full Interrupt Enable for Channel 3.
FFIECH3
14
FIFO Full Interrupt Enable for Channel 2.
FFIECH2
13
FIFO Full Interrupt Enable for Channel 1.
FFIECH1
12
FIFO Full Interrupt Enable for Channel 0.
FFIECH0
11
FIFO Empty Interrupt Enable for Channel 3.
FEIECH3
39-28
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor