PXD20RM Datasheet, PDF (913/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

25.5 Functional description
25.5.1 General
This section provides a complete functional description of the Inter-Integrated Circuit (I²C).
25.5.2 I-Bus Protocol
The I²C Bus system uses a Serial Data line (SDA) and a Serial Clock Line (SCL) for data transfer. All
devices connected to it must have open drain or open collector outputs. A logical AND function is
exercised on both lines with external pull-up resistors. The value of these resistors is system dependent.
Normally, a standard communication is composed of four parts: START signal, slave address transmission,
data transfer and STOP signal. They are described briefly in the following sections and illustrated in
Figure 25-11.
MSB
LSB
SCL
1 2 34 5 6 78 9
MSB
LSB
1 2 34 5 6 78 9
SDA
AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W
XXX D7 D6 D5 D4 D3 D2 D1 D0
Start
Signal
Calling Address
Read/ Ack
Write ^Bit
MSB
LSB
SCL
1 2 34 5 67 89
Data Byte
No Stop
Ack Signal
Bit
MSB
LSB
1 234 5 678 9
SDA AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W
XX
AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W
Start
Signal
Calling Address
Read/ Ack
Write ^Bit
Repeated
Start
Signal
New Calling Address
Figure 25-11. I²C Bus Transmission Signals
Read/ No Stop
Write
Ack Signal
Bit
25.5.2.1 START Signal
When the bus is free, i.e. no master device is engaging the bus (both SCL and SDA lines are at logical
high), a master may initiate communication by sending a START signal. As shown in Figure 25-11, a
START signal is defined as a high-to-low transition of SDA while SCL is high. This signal denotes the
beginning of a new data transfer (each data transfer may contain several bytes of data) and brings all slaves
out of their idle states.
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
25-17