PXD20RM Datasheet, PDF (864/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Offset
0x38
0x3C
0x40
0x3FFF
Table 22-2. GXG Memory Map (continued)
Register
GXGFRST3—Window 3 First Address
GXGLAST3—Window 3 Last Address
GXGSTRIDE - GFX2D Stride Setting
Reserved
Access Reset Value Section/Page
R/W 0x0000_0000 22.3.2.3/22-6
R/W 0x0000_0000 22.3.2.4/22-7
R/W 0x0000_0001 22.3.2.5/22-7
22.3.2 Registers Description
This section describes the GXG registers and their bit fields.
22.3.2.1 Window Configuration (GXGCNFG0-3)
Offset 0x00 (GXGCNFG0)
0x10 (GXGCNFG1)
0x20 (GXGCNFG2)
0x30 (GXGCNFG3)
31
30
29
28
27
26
25
24
23
R0
W
RWD RHW RBY
0
WWD WHW WBY
Reset 0
0
0
0
0
0
0
0
0
Access: User read/write
22
21
20
19
18
17
16
ALPHA
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
MODE
W
0
0
STRIDE
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 22-2. Window Configuration (GXGCNFG0-3)
Table 22-3. Window Configuration (GXGCNFG0-3) Field Description
Field
Description
31
30
RWD
29
RHW
28
RBY
27
Reserved.
Read word-wide swap. See Section 22.4.5, Byte Swapper, for details.
0 Word swapper disabled.
1 Word swapper enabled.
Read half word-wide swap. See Section 22.4.5, Byte Swapper, for details.
0 Halfword swapper disabled.
1 Halfword swapper enabled.
Read byte-wide swap. See Section 22.4.5, Byte Swapper. for details.
0 Byte swapper disabled.
1 Byte swapper enabled.
Reserved.
22-4
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor