PXD20RM Datasheet, PDF (1340/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

The duration of the Sustain phase can be calculated with the method below:
• The entire duration of the Sustain Phase : D_sust = T_{chanel clock}*(SUST +1)
So the entire duration of one note is : D_note = D_atk + D_rel + D_sust
39.6.2.9 Inter-Note No-Output Phase Timing for Channel 3 (NTCH3)
NTCH3 controls the timing of inter-note No-Output phase of Channel 3.
SGM Register Base + 0x0020 (Channel 3)
SGM Register Base + 0x0048 (Channel 2)
SGM Register Base + 0x0070 (Channel 1)
SGM Register Base + 0x0098 (Channel 0)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R0
0
0
0
0
0
0
0
W
NOPT
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
NOPT
W
Reset 1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 39-10. Inter-Note No-Output phase timing for Channel 3 (NTCH3)
Field
31-24
23-0
NOPT
Table 39-13. NTCH3 Register Description
Description
Reserved.
No-Output Timing. These bits control the timing of No-Output phase of the channel 3.
The duration of the no-output phase can be calculated with the method below:
• The entire duration of Attack Phase : D_nop = T_{chanel clock}*(NOPT +1)
39.6.2.10 Target Note Pulse Count for Channel 3 (TPCCH3)
TPCCH3 controls the target note pulse number for Channel 3 in DDS mode.
39-16
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor