PXD20RM Datasheet, PDF (659/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Table 16-18. TCDn 32-bit memory structure
DMA Offset
0x1000 + (32 x n) + 0x00
0x1000 + (32 x n) + 0x04
0x1000 + (32 x n) + 0x08
0x1000 + (32 x n) + 0x0c
0x1000 + (32 x n) + 0x10
0x1000 + (32 x n) + 0x14
0x1000 + (32 x n) + 0x18
0x1000 + (32 x n) + 0x1c
TCDn Field
Source Address (saddr)
Transfer Attributes
(smod, ssize, dmod, dsize)
Signed Source Address Offset (soff)
Signed Minor Loop Offset (smloe, dmloe, mloff)
Inner “Minor” Byte
Count (nbytes)
Last Source Address Adjustment (slast)
Destination Address (daddr)
Current “Major” Iteration Count (citer) Signed Destination Address Offset (doff)
Last Destination Address Adjustment/Scatter Gather Address (dlast_sga)
Beginning “Major” Iteration Count (biter)
Channel Control/Status
(bwc, major.linkch, done, active,
major.e_link, e_sg, d_req, int_half, int_maj,
start)
Figure 16-18 and Table 16-19 define word 0 of the TCDn structure, the saddr field.
Register address: DMA_Offset + 0x1000 + (32 x n) + 0x00
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
saddr[0:15]
W
RESET: -
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
saddr[16:31]
W
RESET: -
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
= Unimplemented
Figure 16-18. TCDn Word 0 (TCDn.saddr) field
Name
saddr[[0:31]
Table 16-19. TCDn Word 0 (TCDn.saddr) field description
Description
Source address
Value
Memory address pointing to the source data.
Figure 16-19 and Table 16-20 define word 1 of the TCDn structure, the soff and transfer attribute fields.
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
16-21