PXD20RM Datasheet, PDF (845/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

• The read state is active when the module is enabled (User Mode Read or UTEST).
• The read state is active when MCR[PGM] and/or MCR[ERS] are high and High Voltage operation
is ongoing (Read While Write).
NOTE
Reads done to the partition(s) being operated on (either erased or
programmed) result in an error and the MCR[RWE] bit is set.
• The read state is active when MCR[PGM] and MCR[PSUS] are high (Program suspend).
• The read state is active when MCR[ERS] and MCR[ESUS] are high and MCR[PGM] is low (Erase
suspend).
In the flash module, FC reads return 128 bits (1 page). MCR reads return 32 bits of data.
WARNING
FC reads are done through the PFLASH2P. In many cases the PFLASH2P
does “read page buffering” to allow sequential reads to be done with higher
performance. This could provide a Data Coherency issue that must be
handled with software. Data Coherency may be an issue after a program or
erase operation, as well as shadow block operations.
In user mode, registers may be written. Array may be written to do interlock writes.
Register reads to unmapped register address space return all 0’s.
Array reads attempted to invalid locations result in indeterminate data and indeterminate error flags.
Invalid locations occur when addressing is done to blocks that do not exist in non 2ⁿ array sizes.
Register writes to unmapped register address space have no effect.
Interlock writes attempted to invalid locations (due to blocks that do not exist in non 2ⁿ array sizes), result
in an interlock occurring, but attempts to program these blocks does not occur since they are forced to be
locked. Erase occurs to selected and unlocked blocks even if the interlock write is to an invalid location.
21.4.1.2 Flash programming
A flash program sequence operates on any page within the FC. Up to 4 words within the page may be
altered in a single program operation. Whenever the array is program, the ECC bits also get programmed.
ECC is handled on a 64 bit boundary. Thus, if only 1 word in any given 64 bit ECC segment is
programmed, the adjoining word (in that segment) should not be programmed since ECC calculation has
already completed for that 64-bit segment. Attempts to program the adjoining word results in an operation
failure (most likely). It is recommended that all programming operations be from 64 bits to 128 bits, and
be 64 bit aligned. The programming operation should completely fill selected ECC segments within the
page. Only one program is allowed per 64 bit ECC segment between erases.
WARNING
In rare cases “over programming” of a 64 bit ECC segment may be done
(EEPROM emulation).
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
21-33