PXD20RM Datasheet, PDF (861/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Chapter 22
Graphics Accelerator Gasket (GXG)
22.1 Introduction
The Graphics Accelerator Gasket (GXG) provides the OpenVG Graphics Accelerator (GFX2D) with a
32-bit IPS to AHB bridge to the slave port and a 64-bit AXI to AHB bridge to the master port. It also
provides a direct AXI connection to the DRAM controller.
The GXG has an address filter consisting of four programmable windows. Upon address detection, the
GXG has several byte swapping options per window for the read or write data bus. To save on-chip
graphics RAM space during write transactions, the GXG has the capability to suppress transactions upon
address detection of alpha buffers, and to convert color depth from 32 to 24 bits per pixel upon address
detection of frame buffers. During read transactions of detected addresses, an 8-bit constant is returned for
each alpha byte component.
Table 22-1. Acronyms and Abbreviated Terms
Term
AIPS
AHB
AHB 2.v6
AMBA
ARGB
AXI
AXBS
DRAM
GFX2D
GRAM
GXG
IPS
QuadSPI
Meaning
AHB 2.v6 to IPS Interface Unit
Advanced High Performance Bus
AMBA AHB-Lite version 2.0 with v6 extensions
Advanced Microcontroller Bus Architecture
Alpha, Red, Green, Blue components of 32-bit color format
AMBA Advanced Extensible Interface
AMBA Crossbar Switch
Dynamic Random Access Memory
OpenVG Graphics Accelerator
Graphics Random Access Memory
Graphics Accelerator Gasket
Skyblue line IP Interface
Quad Serial Peripheral Interface
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
22-1