PXD20RM Datasheet, PDF (1560/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

47.2.3.9 HPALRM
Offset 0x20
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
ALARM
W
Reset 0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
0
= Unimplemented or Reserved
Figure 47-10. HPALRM Register
Table 47-11. HPALRM Fields
Field
ALARM
Description
High priority alarm threshold. When FIFO_FILL is higher than this value, high priority bus request will
be asserted.
47.2.3.10 ALPHA
offset 0x24
read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
ALPHA[7:0]
W
Reset 0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
= Unimplemented or Reserved
Figure 47-11. ALPHA Register
Field
ALPHA[7:0]
Table 47-12. ALPHA Fields
Description
Alpha value used for picture blending. This register is configured during vertical blanking and used
from the next video field.
47-12
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor