PXD20RM Datasheet, PDF (1288/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

power-on
1.2V low-voltage detected
(power domain #0)
1.2V low-voltage detected
(power domain #1)
software watchdog timer
2.7V low-voltage detected
MC_RGM
Registers
Platform Interface
MC_ME
MC_CGM
peripherals
RESET
JTAG initiated reset
CPU reset
software reset
checkstop reset
FMPLL0 fail
FXOSC frequency lower than
reference
CMU0 clock frequency
higher/lower than reference
4.5V low-voltage detected
code or data flash fatal error
Reset
State
Machine
CPU
PAD[22:21]
Boot Mode
Capture
SSCM
Figure 37-1. MC_RGMblock diagram
37.1.2 Features
The MC_RGM contains the functionality for the following features:
• ‘Destructive’ resets management
• ‘Functional’ resets management
• Signalling of reset events after each reset sequence (reset status flags)
• Conversion of reset events to SAFE mode or interrupt request events (for further mode details,
please see Chapter 29, Mode Entry Module (MC_ME))
37-12
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor