PXD20RM Datasheet, PDF (92/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

Table 3-2. System pin descriptions (continued)
System pin
Function
I/O
direction
Pad
type
RESET
configuration¹
176 LQFP
Pin number
208 LQFP 416 TEPBGA
XTAL32 Analog output of the 32 KHz
I
S
—
oscillator amplifier circuit.
Input for the clock generator
in bypass mode.
69
85
AF23
NMI
Non-Maskable Interrupt
I/O
S
Input, none
45
53
AC7
VRC_CTRL Voltage Regulator external
NPN Ballast base control
pin
Analo
—
g
29
29
AA3
VREF_
RSDS²
RSDS interface reference
voltage
Analo
—
g
—
145, 165
J24,D24
VREG_ Pin used for factory testing
I
—
—
BYPASS³
26
26
AA2
1 _{Reset configuration is given as I/O direction and pull direction (for example, “Input, pullup”).}
2 _{Although this signal is not a supply for RSDS pads, it needs to be terminated in an external capacitor with a value of 47 pF.}
3 _{VREG_BYPASS should be pulled down externally.}
3.3.5 Nexus pins
On the 176 LQFP and the 208 LQFP package options a reduced set of Nexus pins are optionally available,
multiplexed with GPIO pins.
On the 416 TEPBGA package option all Nexus pins are dedicated to Nexus only.
Table 3-3. Nexus pins
System pin
Function
Pad
type
PCR
176 LQFP
Pin number¹
208 LQFP
416 TEPBGA
EVTI
Nexus Event In
M
PCR[80]
169
201
A17
EVTO
Nexus Event Out
M
PCR[70]
157
189
C20
MCKO
Nexus Msg Clock Out
F
PCR[85]
174
206
B18
MSEO[0] Nexus Msg Start/End Out
M
PCR[71]
158
190
B20
MSEO[2] Nexus Msg Start/End Out
M
PCR[73]
159
191
A20
MDO[0]
Nexus Msg Data Out
M
PCR[81]
170
202
D16
MDO[1]
Nexus Msg Data Out
M
PCR[82]
171
203
C16
MDO[2]
Nexus Msg Data Out
M
PCR[83]
172
204
B16
MDO[3]
Nexus Msg Data Out
M
PCR[84]
173
205
A16
EVTI
Nexus Event In
M
PCR[197]
n/a
n/a
AD8
PXD20 Microcontroller Reference Manual, Rev. 1
3-8
Freescale Semiconductor
Preliminary—Subject to Change Without Notice