PXD20RM Datasheet, PDF (1598/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

NOTE
Glitch filter control and pad configuration should be done while the external
interrupt line is disabled in order to avoid erroneous triggering by glitches
caused by the configuration process itself.
49.5.3.1 External interrupt management
Each external interrupt can be enabled or disabled independently. This can be performed using the
Interrupt Request Enable Register (IRER). A pad defined as an external interrupt can be configured by the
user to recognize external interrupts with an active rising edge, an active falling edge or both edges being
active.
NOTE
Writing a ‘0’ to both IREE[x] and IFEE[x] disables the external interrupt
functionality for that pad completely (i.e. no system wakeup or interrupt will
be generated on any activity on that pad)!
The active IRQ edge is controlled by the users through the configuration of the registers WIREER and
WIFEER.
Each external interrupt supports an individual flag which is held in the flag register (WISR). This register
is a clear-by-write-1 register type, preventing inadvertent overwriting of other flags in the same register.
49.5.3.2 On-chip wakeup management
Each wakeup can be enabled or disabled independently using the Wakeup Request Enable Register
(WRER). The active wakeup edge is controlled by the users through the configuration of the WIREER and
WIFEER registers.
Each internal and external wakeup sets an individual flag which is held in the flag register (WISR). This
register is a clear-by-write-1 register type, preventing inadvertent overwriting of other flags in the same
register.
49-14
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
Freescale Semiconductor