PXD20RM Datasheet, PDF (973/1628 Pages) Freescale Semiconductor, Inc – PXD20 Microcontroller

input. The actual value of the LINRX input pin is disregarded by the LINFlexD. The transmitted messages
can be monitored on the LINTX pin.
27.8.2 Self Test mode
LINFlexD can be put in Self Test mode by setting LINCR1[LBKM] and LINCR1[SFTM]. This mode can
be used for a “Hot Self Test”, meaning the LINFlexD can be tested as in Loop Back mode but without
affecting a running LIN system connected to the LINTX and LINRX pins. In this mode, the LINRX pin is
disconnected from the LINFlexD and the LINTX pin is held recessive. This is illustrated in Figure 27-13.
LINFlexD
Tx
Rx
=1
LINTX LINRX
Figure 27-13. LINFlexD in Self Test mode
27.9 UART mode
The main features of UART mode are presented in Section 27.2.2, UART mode features.
27.9.1 Data frame structure
27.9.1.1 8-bit data frame
The 8-bit UART data frame is shown in Figure 27-14. The 8th bit can be a data or a parity bit. Parity (even,
odd, 0, or 1) can be selected by the UARTCR[PC] field. An even parity is set if the modulo-2 sum of the
7 data bits is 1. An odd parity is cleared in this case.
Byte Field
Start
bit ^{D0 D1 D2 D3 D4 D5 D6 D7}
Stop
bit
- Data bit
- Parity bit
Figure 27-14. UART mode 8-bit data frame
27.9.1.2 9-bit data frame
The 8-bit UART data frame is shown in Figure 27-15. The 9th bit is a parity bit. Parity (even, odd, 0, or 1)
can be selected by the by the UARTCR[PC] field. An even parity is set if the modulo-2 sum of the 7 data
Freescale Semiconductor
PXD20 Microcontroller Reference Manual, Rev. 1
Preliminary—Subject to Change Without Notice
27-17